3799 search results - page 12 / 760 » Low Power or High Performance |
VLSID
1996
IEEE
13 years 11 months ago
1996
IEEE
The technique of mirror biasing is introduced and applied to a very high gain two stage CMOS cascode op-amp, in order to desensitize its output voltage to bias variations. Various...
DAC
1999
ACM
13 years 12 months ago
1999
ACM
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
IAJIT
2010
13 years 6 months ago
2010
: This paper proposes a pipelined, systolic architecture for two- dimensional discrete Fourier transform computation which is highly concurrent. The architecture consists of two, o...
ISLPED
2000
ACM
13 years 12 months ago
2000
ACM
A new high-speed Domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-o between performance and noise margins in conventional CD-Domino logic while dissipat...
ISLPED
2003
ACM
14 years 26 days ago
2003
ACM
This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First...