1004 search results - page 22 / 201 » Low power methodology and design techniques for processor de... |
CODES
2004
IEEE
14 years 6 days ago
2004
IEEE
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
ISLPED
2007
ACM
13 years 10 months ago
2007
ACM
A 0.4-V UWB digital baseband processor has been fabricated in a standard-VT 90-nm CMOS technology. The baseband processor operates at an ultra-low supply voltage to reduce energy ...
ISLPED
2000
ACM
14 years 1 days ago
2000
ACM
This paper presents a state assignment technique called priority encoding which uses multi-code assignment plus clock gating to reduce power dissipation in sequential circuits. Th...
DFT
2005
IEEE
13 years 10 months ago
2005
IEEE
A built-in self-test (BIST) scheme is presented which both reduces overhead for detecting random-pattern-resistant (r.p.r.) faults as well as reduces power consumption during test...
ICS
2010
Tsinghua U.
13 years 7 months ago
2010
Tsinghua U.
Abstract—Power modeling based on performance monitoring counters (PMCs) has attracted the interest of many researchers since it become a quick approach to understand and analyse ...