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» Low power techniques for Motion Estimation hardware
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ISQED
2002
IEEE
168views Hardware» more  ISQED 2002»
15 years 10 months ago
ALBORZ: Address Level Bus Power Optimization
In this paper we introduce a new low power address bus encoding technique, and the resulting code, named ALBORZ. The ALBORZ code is constructed based on transition signaling the l...
Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram
ISCAS
2003
IEEE
118views Hardware» more  ISCAS 2003»
15 years 11 months ago
Embedded reconfigurable array targeting motion estimation applications
Motion estimation is a complex computation found in video compression algorithms, such as standards like MPEG-4 and H.263. This paper proposes an embedded reconfigurable array for...
Sami Khawam, Tughrul Arslan, Fred Westall
CASES
2007
ACM
15 years 9 months ago
A low power front-end for embedded processors using a block-aware instruction set
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Ahmad Zmily, Christos Kozyrakis
ISLPED
1996
ACM
89views Hardware» more  ISLPED 1996»
15 years 10 months ago
A novel methodology for transistor-level power estimation
Transistlw-level power simulators, which are more accurate than logic-level power estimators, have been popularly used to estimate the power dissipation of CMOS circuits. In thisp...
Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, ...
ISQED
2006
IEEE
176views Hardware» more  ISQED 2006»
15 years 11 months ago
Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
Zhiyu Liu, Volkan Kursun