152 search results - page 12 / 31 » Noise considerations in circuit optimization |
ICCAD
2000
IEEE
14 years 5 days ago
2000
IEEE
In this paper, we present a novel approach to use test stimuli generated by digital components of a mixed-signal circuit for testing its analog components. A wavelet transform is ...
DATE
1999
IEEE
14 years 3 days ago
1999
IEEE
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
MICRO
2006
IEEE
13 years 7 months ago
2006
IEEE
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
ISLPED
1995
ACM
13 years 11 months ago
1995
ACM
A dual-rail CMOS adiabatic switching circuit approach is described which follows the electroid model of Hall. These circuits can operate in either the retractile cascade or the re...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
— In this paper, we propose an efficient algorithm to reduce the voltage noises for on-chip power/ground (P/G) networks of VLSI. The new method is based on the sequence of linea...