325 search results - page 13 / 65 » Non-uniform Instruction Scheduling |
LCTRTS
2001
Springer
13 years 11 months ago
2001
Springer
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
MICRO
2002
IEEE
14 years 9 days ago
2002
IEEE
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Energy dissipation from the issue queue and register file constitutes a large portion of the overall energy budget of an aggressive dynamically scheduled microprocessor. We propo...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...