Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
The tip asymmetry of a bevel-tip needle results in the needle naturally bending when it is inserted into soft tissue. This enables robotic needle steering, which can be used in me...
Sarthak Misra, Kyle B. Reed, Benjamin W. Schafer, ...
In this work, we investigate the use of directional antennas and beam steering techniques to improve performance of 802.11 links in the context of communication between a moving v...