Sciweavers

301 search results - page 36 / 61
» Physical design techniques for optimizing RTA-induced variat...
Sort
View
ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
14 years 1 months ago
Performance Optimization of Latency Insensitive Systems Through Buffer Queue Sizing of Communication Channels
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
Ruibing Lu, Cheng-Kok Koh
DATE
2007
IEEE
96views Hardware» more  DATE 2007»
14 years 2 months ago
Self-heating-aware optimal wire sizing under Elmore delay model
Global interconnect temperature keeps rising in the current and future technologies due to self-heating and the adiabatic property of top metal layers. The thermal e ects impact a...
Min Ni, Seda Ogrenci Memik
KDD
2004
ACM
151views Data Mining» more  KDD 2004»
14 years 9 months ago
Feature selection in scientific applications
Numerous applications of data mining to scientific data involve the induction of a classification model. In many cases, the collection of data is not performed with this task in m...
Erick Cantú-Paz, Shawn Newsam, Chandrika Ka...
DAC
2004
ACM
14 years 7 days ago
Enabling energy efficiency in via-patterned gate array devices
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architecture...
R. Reed Taylor, Herman Schmit
ICCAD
2009
IEEE
117views Hardware» more  ICCAD 2009»
13 years 6 months ago
Binning optimization based on SSTA for transparently-latched circuits
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
Min Gong, Hai Zhou, Jun Tao, Xuan Zeng