296 search results - page 21 / 60 » Power Estimation in Sequential Circuits |
ISLPED
1997
ACM
14 years 7 days ago
1997
ACM
This paper proposes a novel method to estimate and to reduce redundant power of synchronous circuits at RT level design. Because much redundant power is caused by redundant clocki...
ISQED
2002
IEEE
14 years 29 days ago
2002
IEEE
— The inductive characteristics of several types of gridded power distribution networks are described in this paper. The inductance extraction program FastHenry is used to evalua...
EVOW
1999
Springer
14 years 9 days ago
1999
Springer
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
VTS
1998
IEEE
14 years 8 days ago
1998
IEEE
This paper proposes an ATPG technique that reduces power dissipation during the test of sequential circuits. The proposed approach exploits some redundancy introduced during the t...
DAC
1998
ACM
14 years 9 months ago
1998
ACM
In this paper we present a statistical method for estimating the maximum power consumption in VLSI circuits. The method is based on the theory of extreme order statistics applied ...