121 search results - page 17 / 25 » Power distribution techniques for dual VDD circuits |
ICCD
2002
IEEE
14 years 5 months ago
2002
IEEE
Ubiquitous computing is a next generation information technology where computers and communications will be scaled further, merged together, and materialized in consumer applicati...
HPCA
2003
IEEE
14 years 9 months ago
2003
IEEE
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
GLVLSI
2009
IEEE
14 years 14 days ago
2009
IEEE
In this paper, we present the design of a P4 (Power-PerformanceProcess-Parasitic) aware voltage controlled oscillator (VCO) at nanoCMOS technologies. Through simulations, we have ...
ISLPED
1999
ACM
14 years 28 days ago
1999
ACM
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
ISLPED
2004
ACM
14 years 2 months ago
2004
ACM
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...