764 search results - page 3 / 153 » Pre-synthesis optimization of multiplications to improve cir... |
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
DAC
1998
ACM
13 years 11 months ago
1998
ACM
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
DAC
2009
ACM
14 years 2 months ago
2009
ACM
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
ARITH
2003
IEEE
14 years 23 days ago
2003
IEEE
This paper presents some improvements on the optimization of hardware multiplication by constant matrices. We focus on the automatic generation of circuits that involve constant m...