129 search results - page 17 / 26 » Process Variations and their Impact on Circuit Operation |
DATE
2005
IEEE
14 years 29 days ago
2005
IEEE
Variability in process parameters is making accurate timing analysis of nano-scale integrated circuits an extremely challenging task. In this paper, we propose a new algorithm for...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
In the nanometer manufacturing region, process variation causes significant uncertainty for circuit performance verification. Statistical static timing analysis (SSTA) is thus dev...
ASPDAC
2010
ACM
13 years 5 months ago
2010
ACM
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
ISCAS
2002
IEEE
14 years 8 days ago
2002
IEEE
This paper presents new circuit configurationsfor a more robust and efficient form of self-resettingCMOS (SRCMOS). Prior structures for SRCMOS have very high performance but are...
DAGSTUHL
2009
13 years 8 months ago
2009
Modelling architectural information is particularly important because of the acknowledged crucial role of software architecture in raising the level of abstraction during developme...