Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
In high-level synthesis for FPGA designs, scheduling and chaining of operations for optimal performance remain challenging problems. In this paper, we present a balanced schedulin...
David Zaretsky, Gaurav Mittal, Robert P. Dick, Pri...
: Much effort in RTL design has been devoted to developing “push-button” types of tools. However, given the highly complex nature, and lack of control on RTL design, push-butt...
Reliability decisions taken early in system design can bring significant benefits in terms of design quality. This paper presents a 0-1 integer linear programming (ILP) formulatio...
There have been several recent attempts to include duplication-based on-line testability in behaviourally synthesized designs. In this paper, on-line testability is considered wit...
Petros Oikonomakos, Mark Zwolinski, Bashir M. Al-H...