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GLVLSI
2010
IEEE
171views VLSI» more  GLVLSI 2010»
14 years 2 months ago
Timing-driven variation-aware nonuniform clock mesh synthesis
Clock skew variations adversely affect timing margins, limiting performance, reducing yield, and may also lead to functional faults. Non-tree clock distribution networks, such as ...
Ameer Abdelhadi, Ran Ginosar, Avinoam Kolodny, Eby...
ICCAD
2008
IEEE
130views Hardware» more  ICCAD 2008»
14 years 5 months ago
Lightweight secure PUFs
— To ensure security and robustness of the next generation of Physically Unclonable Functions (PUFs), we have developed a new methodology for PUF design. Our approach employs int...
Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potk...
DATE
2002
IEEE
73views Hardware» more  DATE 2002»
14 years 1 months ago
A Burst-Mode Oriented Back-End for the Balsa Synthesis System
This paper introduces several new component clustering techniques for the optimization of asynchronous systems. In particular, novel “Burst-Mode aware” restrictions are impose...
Tiberiu Chelcea, Steven M. Nowick, Andrew Bardsley...
GLVLSI
2009
IEEE
262views VLSI» more  GLVLSI 2009»
13 years 6 months ago
Power distribution paths in 3-D ICS
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...
Vasilis F. Pavlidis, Giovanni De Micheli
ASPDAC
2007
ACM
164views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Thermal-Aware 3D IC Placement Via Transformation
- 3D IC technologies can help to improve circuit performance and lower power consumption by reducing wirelength. Also, 3D IC technology can be used to realize heterogeneous system-...
Jason Cong, Guojie Luo, Jie Wei, Yan Zhang