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» Resistive Bridging Fault Simulation of Industrial Circuits
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DATE
2006
IEEE
98views Hardware» more  DATE 2006»
14 years 3 months ago
Test generation for combinational quantum cellular automata (QCA) circuits
— In this paper, we present a test generation framework for testing of quantum cellular automata (QCA) circuits. QCA is a nanotechnology that has attracted significant recent at...
Pallav Gupta, Niraj K. Jha, Loganathan Lingappan
DATE
2008
IEEE
75views Hardware» more  DATE 2008»
14 years 4 months ago
A low-cost concurrent error detection technique for processor control logic
This paper presents a concurrent error detection technique targeted towards control logic in a processor with emphasis on low area overhead. Rather than detect all modeled transie...
Ramtilak Vemu, Abhijit Jas, Jacob A. Abraham, Srin...
VLSID
2004
IEEE
147views VLSI» more  VLSID 2004»
14 years 10 months ago
Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
Shabbir H. Batterywala, Narendra V. Shenoy
VTS
2006
IEEE
93views Hardware» more  VTS 2006»
14 years 3 months ago
Upper Bounding Fault Coverage by Structural Analysis and Signal Monitoring
A new algorithm for identifying stuck faults in combinational circuits that cannot be detected by a given input sequence is presented. Other than pre and post-processing steps, ce...
Vishwani D. Agrawal, Soumitra Bose, Vijay Gangaram
ATS
2009
IEEE
117views Hardware» more  ATS 2009»
14 years 4 months ago
N-distinguishing Tests for Enhanced Defect Diagnosis
Diagnostic ATPG has traditionally been used to generate test patterns that distinguish pairs of modeled faults. In this work, we investigate the use of n-distinguishing test sets,...
Gang Chen, Janusz Rajski, Sudhakar M. Reddy, Irith...