175 search results - page 9 / 35 » SOC Testing Methodology and Practice |
ISVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
ICCAD
2000
IEEE
14 years 2 months ago
2000
IEEE
Spurred by technology leading to the availability of millions of gates per chip, system-level integration is evolving as a new paradigm, allowing entire systems to be built on a s...
ICCAD
2002
IEEE
14 years 6 months ago
2002
IEEE
With increasing design sizes and adoption of System on a Chip (SoC) methodology, design synthesis and test automation tools are hitting capacity and performance bottlenecks. Curre...
DAC
2006
ACM
13 years 11 months ago
2006
ACM
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
VLSID
2009
IEEE
14 years 10 months ago
2009
IEEE
Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time ...