1304 search results - page 130 / 261 » Simulation of Soliton Circuits |
116
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DAC
1996
ACM
15 years 10 months ago
1996
ACM
In this paper, we present the rst chip-level electrothermal simulator, iCET. For a given chip layout, packaging material, user-speci ed input signal patterns, and thermal boundar...
209
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DAC
2011
ACM
14 years 5 months ago
2011
ACM
In this work, we propose an efficient and accurate full-chip thermomechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical rel...
178
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DAC
2004
ACM
16 years 6 months ago
2004
ACM
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
181
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DAC
2006
ACM
16 years 6 months ago
2006
ACM
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
152
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DAC
2006
ACM
16 years 6 months ago
2006
ACM
Chips manufactured in 90 nm technology have shown large parametric variations, and a worsening trend is predicted. These parametric variations make circuit optimization difficult ...