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DATE
2008
IEEE
75views Hardware» more  DATE 2008»
16 years 7 days ago
A low-cost concurrent error detection technique for processor control logic
This paper presents a concurrent error detection technique targeted towards control logic in a processor with emphasis on low area overhead. Rather than detect all modeled transie...
Ramtilak Vemu, Abhijit Jas, Jacob A. Abraham, Srin...
ICCAD
2008
IEEE
172views Hardware» more  ICCAD 2008»
16 years 7 days ago
Frequency-aware PPV: a robust phase macromodel for accurate oscillator noise analysis
— Perturbation Projection Vector (PPV) is an established technique for oscillator phase noise analysis; However, the PPV method significantly loses accuracy when circuits have l...
Xiaolue Lai
ISQED
2008
IEEE
103views Hardware» more  ISQED 2008»
16 years 5 days ago
Process Variation Characterization and Modeling of Nanoparticle Interconnects for Foldable Electronics
— Designers require variational information for robust designs. Characterization of such information can be costly for the novel nanoparticle interconnect process, which utilize ...
Rasit Onur Topaloglu
DATE
2007
IEEE
98views Hardware» more  DATE 2007»
16 years 4 days ago
Simulation-based reusable posynomial models for MOS transistor parameters
We present an algorithm to automatically design posynomial models for parameters of the MOS transistors using simulation data. These models improve the accuracy of the Geometric P...
Varun Aggarwal, Una-May O'Reilly
VTS
2007
IEEE
100views Hardware» more  VTS 2007»
16 years 1 days ago
Using Scan-Dump Values to Improve Functional-Diagnosis Methodology
In this paper, we identify two main bottlenecks in the functional diagnosis flow and propose new ways to overcome these. Our approach completely eliminates the “Primary Input (P...
Vishnu C. Vimjam, Enamul Amyeen, Ruifeng Guo, Srik...