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DSD
2010
IEEE
144views Hardware» more  DSD 2010»
13 years 7 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen
ATS
2010
IEEE
261views Hardware» more  ATS 2010»
13 years 4 months ago
The Test Ability of an Adaptive Pulse Wave for ADC Testing
In the conventional ADC production test method, a high-quality analogue sine wave is applied to the Analogue-toDigital Converter (ADC), which is expensive to generate. Nowadays, an...
Xiaoqin Sheng, Hans G. Kerkhoff
APGV
2009
ACM
129views Visualization» more  APGV 2009»
14 years 1 months ago
Display considerations for night and low-illumination viewing
An inadequately designed display viewed in the dark can easily cause dazzling glare and affect our night vision. In this paper we test a display design in which the spectral light...
Rafal Mantiuk, Allan G. Rempel, Wolfgang Heidrich
DAC
2003
ACM
14 years 7 months ago
A survey of techniques for energy efficient on-chip communication
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
Vijay Raghunathan, Mani B. Srivastava, Rajesh K. G...
ICCD
2005
IEEE
129views Hardware» more  ICCD 2005»
14 years 3 months ago
Temperature-Aware Voltage Islands Architecting in System-on-Chip Design
As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC p...
Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vi...