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    DSD
    2005
    IEEE
    105views Hardware» more  DSD 2005»
    Improved Fault Emulation for Synchronous Sequential Circuits
    14 years 2 months ago
    Improved Fault Emulation for Synchronous Sequential Circuits
    Download  www.pld.ttu.ee
    Current paper presents new alternatives for accelerating the task of fault simulation for sequential circuits by hardware emulation on FPGA. Fault simulation is an important subta...
    Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, R...
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    GLVLSI
    2010
    IEEE
    138views VLSI» more  GLVLSI 2010»
    Methodology to achieve higher tolerance to delay variations in synchronous circuits
    14 years 1 months ago
    Methodology to achieve higher tolerance to delay variations in synchronous circuits
    Download  www.ece.rochester.edu
    A methodology is proposed for designing robust circuits exhibiting higher tolerance to process and environmental variations. This higher tolerance is achieved by exploiting the in...
    Emre Salman, Eby G. Friedman
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    CAV
    1990
    Springer
    114views Hardware» more  CAV 1990»
    Formal Verification of Digital Circuits Using Symbolic Ternary System Models
    14 years 19 days ago
    Formal Verification of Digital Circuits Using Symbolic Ternary System Models
    Download  www.cs.cmu.edu
    Ternary system modeling involves extending the traditional set of binary values
    Randal E. Bryant, Carl-Johan H. Seger
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    ASPDAC
    1999
    ACM
    105views Hardware» more  ASPDAC 1999»
    Clock Period Minimization of Semi-Synchronous Circuits by Gate-Level Delay Insertion
    14 years 27 days ago
    Clock Period Minimization of Semi-Synchronous Circuits by Gate-Level Delay Insertion
    Download  www.lab.ss.titech.ac.jp
    Tomoyuki Yoda, Atsushi Takahashi, Yoji Kajitani
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    DAC
    1999
    ACM
    122views Computer Architecture» more  DAC 1999»
    Cycle-Based Symbolic Simulation of Gate-Level Synchronous Circuits
    14 years 27 days ago
    Cycle-Based Symbolic Simulation of Gate-Level Synchronous Circuits
    Download  www.cecs.uci.edu
    Valeria Bertacco, Maurizio Damiani, Stefano Quer
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