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» System level design, a VHDL based approach
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ISLPED
1998
ACM
95views Hardware» more  ISLPED 1998»
15 years 10 months ago
The petrol approach to high-level power estimation
High-level power estimation is essential for designing complex low-power ICs. However, the lack of flexibility, or restriction to synthesizable code of previously presented high-...
Rafael Peset Llopis, Kees G. W. Goossens
DATE
2003
IEEE
134views Hardware» more  DATE 2003»
15 years 11 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
DSD
2008
IEEE
124views Hardware» more  DSD 2008»
16 years 9 days ago
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
ISSS
2002
IEEE
144views Hardware» more  ISSS 2002»
15 years 10 months ago
A Visual Approach to Validating System Level Designs
This paper proposes a simulation-based methodology for validation of a system under design in an early phase of development. The key element of this approach is the visual speciï¬...
Jürgen Ruf, Thomas Kropf, Jochen Klose
3DIC
2009
IEEE
169views Hardware» more  3DIC 2009»
15 years 11 months ago
3-D memory organization and performance analysis for multi-processor network-on-chip architecture
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...
Awet Yemane Weldezion, Zhonghai Lu, Roshan Weerase...