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PATMOS
2004
Springer
14 years 1 months ago
A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
DATE
2002
IEEE
154views Hardware» more  DATE 2002»
14 years 18 days ago
Low Power Error Resilient Encoding for On-Chip Data Buses
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
Davide Bertozzi, Luca Benini, Giovanni De Micheli
VLSID
2001
IEEE
179views VLSI» more  VLSID 2001»
14 years 8 months ago
Low-Power Wireless Sensor Networks
- Wireless distributed microsensor systems will enable fault tolerant monitoring and control of a variety of applications. Due to the large number of microsensor nodes that may be ...
Rex Min, Manish Bhardwaj, Seong-Hwan Cho, Eugene S...
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
14 years 2 months ago
Very wide register: an asymmetric register file organization for low power embedded processors
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
14 years 8 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey