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» Test Generation and Fault Localization for Quantum Circuits
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VLSID
1995
IEEE
112views VLSI» more  VLSID 1995»
13 years 11 months ago
An efficient automatic test generation system for path delay faults in combinational circuits
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vi...
TODAES
1998
64views more  TODAES 1998»
13 years 7 months ago
Functional test generation for delay faults in combinational circuits
Irith Pomeranz, Sudhakar M. Reddy
GLVLSI
2002
IEEE
136views VLSI» more  GLVLSI 2002»
14 years 12 days ago
Test generation for resistive opens in CMOS
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
Arun Krishnamachary, Jacob A. Abraham
ICCD
2006
IEEE
105views Hardware» more  ICCD 2006»
14 years 1 months ago
A New Class of Sequential Circuits with Acyclic Test Generation Complexity
—This paper introduces a new class of sequential circuits called acyclically testable sequential circuits which is wider than the class of acyclic sequential circuits but whose t...
Chia Yee Ooi, Hideo Fujiwara
ICCAD
2000
IEEE
124views Hardware» more  ICCAD 2000»
13 years 12 months ago
Deterministic Test Pattern Generation Techniques for Sequential Circuits
This paper presents new test generation techniques for improving the average-case performance of the iterative logic array based deterministic sequential circuit test generation a...
Ilker Hamzaoglu, Janak H. Patel