Sciweavers

1994 search results - page 62 / 399
» The design of a high performance low power microprocessor
Sort
View
HPCC
2007
Springer
14 years 3 months ago
A Low-Power Globally Synchronous Locally Asynchronous FFT Processor
Abstract. Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to efï¬...
Yong Li, Zhiying Wang, Jian Ruan, Kui Dai
ISLPED
1999
ACM
129views Hardware» more  ISLPED 1999»
14 years 1 months ago
Power scalable processing using distributed arithmetic
A recent trend in low power design has been the employment of reduced precision processing methods for decreasing arithmetic activity and average power dissipation. Such designs c...
Rajeevan Amirtharajah, Thucydides Xanthopoulos, An...
DAC
2002
ACM
14 years 9 months ago
Analysis of power consumption on switch fabrics in network routers
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, inte...
Terry Tao Ye, Giovanni De Micheli, Luca Benini
DAC
2004
ACM
14 years 9 months ago
Leakage-and crosstalk-aware bus encoding for total power reduction
Power consumption, particularly runtime leakage, in long on-chip buses has grown to an unacceptable portion of the total power budget due to heavy buffer insertion to combat RC de...
Harmander Deogun, Rajeev R. Rao, Dennis Sylvester,...
DATE
2006
IEEE
176views Hardware» more  DATE 2006»
14 years 2 months ago
Low power synthesis of dynamic logic circuits using fine-grained clock gating
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Mei...