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» Transformational Placement and Synthesis
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IAJIT
2010
107views more  IAJIT 2010»
13 years 6 months ago
Low Latency, High Throughput, and Less Complex VLSI Architecture for 2D-DFT
: This paper proposes a pipelined, systolic architecture for two- dimensional discrete Fourier transform computation which is highly concurrent. The architecture consists of two, o...
Sohil Shah, Preethi Venkatesan, Deepa Sundar, Muni...
VLSID
2002
IEEE
99views VLSI» more  VLSID 2002»
14 years 8 months ago
Input Space Adaptive Embedded Software Synthesis
This paper presents a novel technique, called input space adaptive software synthesis, for the energy and performance optimization of embedded software. The proposed technique is ...
Weidong Wang, Anand Raghunathan, Ganesh Lakshminar...
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 4 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
Daniel L. Rosenband
DAC
2003
ACM
14 years 8 months ago
Dynamic hardware/software partitioning: a first approach
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
Greg Stitt, Roman L. Lysecky, Frank Vahid
DAC
2004
ACM
14 years 8 months ago
Design automation for mask programmable fabrics
Programmable circuit design has played an important role in improving design productivity over the last few decades. By imposing structure on the design, efficient automation of s...
Narendra V. Shenoy, Jamil Kawa, Raul Camposano