30 search results - page 4 / 6 » Very Low Voltage Testing of SOI Integrated Circuits |
ISCAS
1999
IEEE
13 years 11 months ago
1999
IEEE
Current mode (ECL) logic has long been the option of choice in those applications requiring logic functions at multigigahertz rates. This trend continues despite the obvious very ...
DAC
2002
ACM
14 years 7 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
DAC
2005
ACM
14 years 7 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
DATE
2005
IEEE
14 years 6 days ago
2005
IEEE
Multi-channel waveform monitoring technique enhances built-in test and diagnostic capability of mixed-signal VLSI circuits. An 8-channel prototype system incorporates adaptive sam...
VLSID
2000
IEEE
13 years 11 months ago
2000
IEEE
The test signal method can be used to measure and model inductance parameters (self and mutual) of a very small interconnect especially in highdensity IC’s by using a test signa...