In the past, there have been several denial-of-service (DOS) attacks which exhaust some shared resource (e.g., physical memory, process table, file descriptors, TCP connections) ...
Jahangir Hasan, Ankit Jalote, T. N. Vijaykumar, Ca...
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
We describe the implementation of “MARS,” a GUI, Java-based simulator for the MIPS assembly language. MIPS, the computer architecture underlying the simulated assembly languag...
We propose a novel and efficient charge-based decoupling capacitance budgeting algorithm. Our method uses the macromodeling technique and effective radius of decoupling capacitan...
Min Zhao, Rajendran Panda, Savithri Sundareswaran,...
This article describes a new software-based on-line memory compression algorithm for embedded systems and presents a method of adaptively managing the uncompressed and compressed ...
We present a new method for mathematically estimating the active unit power of functional units in modern microprocessors such as the Pentium 4 family. Our method leverages the ph...
Wei Wu, Lingling Jin, Jun Yang 0002, Pu Liu, Sheld...
Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this paper, a predictive model is developed for the deg...
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
: Creating ICs in the nanometer age is a high-stakes race that few companies can afford to compete in – and even fewer can win. Hear how senior technologists from the world’s t...
G. Singer, Philippe Magarshack, Dennis Buss, F.-C....