VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
This paper presents Frame Based Fair Multiprocessor Scheduler (FBFMS) which provides accurate real-time proportional fair scheduling for a set of dynamic tasks on a symmetric mult...
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
In this paper, for the first time, we analyze non-quasistatic (NQS) effects during single-event upsets (SEUs) in deep-submicron (DSM) MOS devices, using extensive 2D device, BSIM...
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
As the IC process technology scales, the oxide thickness and operating voltage continues to decrease. The gate oxide thickness in recent and future IC process technology has appro...
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
The main result of this paper, proved as a theorem, is that a lower bound on the number of test vectors that detect each fault at least N times is N
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
Design space exploration is central to embedded system design. Typically this is a multi-objective search problem, where performance, power, area etc. are the different optimizati...
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
In this paper, we present two novel synchronization approaches to support data flow in clockless designs using single-rail encoding. Both approaches are based on self-resetting st...
SBACPAD
2006
IEEE
2006
IEEE
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
14 years 5 months ago
We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inferen...