FPL
2007
Springer
14 years 6 months ago
2007
Springer
In this paper we present an automatic design flow for generating customized embedded FPGA (eFPGA) fabric and a domain specific SOC+eFPGA architecture. This design flow encompas...
FPL
2007
Springer
14 years 6 months ago
2007
Springer
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
FPL
2007
Springer
14 years 6 months ago
2007
Springer
Reconfigurable computing entails the utilization of a generalpurpose processor augmented with a reconfigurable hardware structure (usually an FPGA). Normally, a complete recon...
FPGA
2007
ACM
14 years 6 months ago
2007
ACM
Chip design in the nanometer regime is becoming increasingly difficult due to process variations. ASIC designers have adopted statistical optimization techniques to mitigate the e...
FPGA
2007
ACM
14 years 6 months ago
2007
ACM
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
IPPS
2007
IEEE
14 years 6 months ago
2007
IEEE
1 FPGAs are an appealing solution for the space-based remote sensing applications. However, in a low-earth orbit, configuration bits of SRAM-based FPGAs are susceptible to single-e...
DDECS
2007
IEEE
14 years 6 months ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
CODES
2007
IEEE
14 years 6 months ago
2007
IEEE
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
AHS
2007
IEEE
14 years 6 months ago
2007
IEEE
Since their invention in the 1980s, the logic density of FPGAs has increased exponentially with time. This increase of logic density first led to the development of synthesisable ...
ICASSP
2008
IEEE
14 years 6 months ago
2008
IEEE
In this paper, we propose a systemic approach for synthesizing field-programmable gate array (FPGA) implementations of fast Fourier transform (FFT) computations. Our approach cons...