Multitasking on reconfigurable logic can achieve very high silicon reusability. However, configuration latency is a major limitation and it can largely degrade the system performa...
Modeling systems based on semi-formal graphical formalisms, such as Statecharts, has become standard practice in the design of reactive embedded devices. However, the modeling of ...
Transparent-scan was proposed as an approach to test generation and test compaction for scan circuits. Its effectiveness was demonstrated earlier in reducing the test application ...
Generation of n -detection test sets is typically done for a single fault model. In this work we investigate the generation of n -detection test sets by pairing each fault of a ta...
We present an approach to prevent overtesting in scan-based delay test. The test data is transformed with respect to functional constraints while simultaneously keeping as many po...
A significant volume of research has concentrated on operating-system directed power management (OSPM). The primary focus of previous research has been the development of OSPM po...
Enhancing productivity for designing complex embedded systems requires system level design methodology and language support for capturing complex design in high level models. For ...
Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Ber...
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex multi-processor system-on-chip (MPSoC) designs. The memory...
In this paper we propose a dynamic code overlay technique of synchronous data-flow (SDF) –modeled program for low-end embedded systems which lack MMUsupport. With this technique...
Hae-woo Park, Kyoungjoo Oh, Soyoung Park, Myoung-m...