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146
Voted
QEST
2010
IEEE
15 years 13 days ago
Automatic Compositional Reasoning for Probabilistic Model Checking of Hardware Designs
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...
Jayanand Asok Kumar, Shobha Vasudevan
134
Voted
NOCS
2010
IEEE
15 years 13 days ago
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
Tushar N. K. Jain, Paul V. Gratz, Alexander Sprint...
118
Voted
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 14 days ago
AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-Case Vulnerability to Soft Errors
Soft error reliability is increasingly becoming a first-order design concern for microprocessors, as a result of higher transistor counts, shrinking device geometries and lowering ...
Arun A. Nair, Lizy Kurian John, Lieven Eeckhout
137
Voted
IWEC
2010
15 years 14 days ago
Investigating the Affective Quality of Motion in User Interfaces to Improve User Experience
This study focuses on motion in user interfaces as a design element which can contribute to an improved user experience of digital media entertainment. The design for user experien...
Doyun Park, Ji-Hyun Lee
124
Voted
ICES
2010
Springer
178views Hardware» more  ICES 2010»
15 years 16 days ago
EvoFab: A Fully Embodied Evolutionary Fabricator
Abstract. Few evolved designs are subsequently manufactured into physical objects
John Rieffel, Dave Sayles
119
Voted
ICCAD
2010
IEEE
146views Hardware» more  ICCAD 2010»
15 years 16 days ago
Through-silicon-via management during 3D physical design: When to add and how many?
In 3D integrated circuits through silicon vias (TSVs) are used to connect different dies stacked on top of each other. These TSV occupy silicon area and have significantly larger a...
Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Ky...
GROUP
2010
ACM
15 years 16 days ago
Design methods as discourse on practice
In this paper, we present a view of design methods as discourse on practice. We consider how the deployment of a particular set of design methods enables and constrains not only p...
Marisa Leavitt Cohn, Susan Elliott Sim, Paul Douri...
130
Voted
FPL
2010
Springer
124views Hardware» more  FPL 2010»
15 years 17 days ago
Finding System-Level Information and Analyzing Its Correlation to FPGA Placement
One of the more popular placement algorithms for Field Programmable Gate Arrays (FPGAs) is called Simulated Annealing (SA). This algorithm tries to create a good quality placement ...
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
123
Voted
EMSOFT
2010
Springer
15 years 17 days ago
Initiating a design pattern catalog for embedded network systems
In the domain of desktop software, design patterns have had a profound impact; they are applied ubiquitously across a broad range of applications. Patterns serve both to promulgat...
Sally K. Wahba, Jason O. Hallstrom, Neelam Soundar...
138
Voted
DAC
2010
ACM
15 years 17 days ago
Non-uniform clock mesh optimization with linear programming buffer insertion
Clock meshes are extremely effective at filtering clock skew from environmental and process variations. For this reason, clock meshes are used in most high performance designs. Ho...
Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis