Sciweavers

DATE
2008
IEEE
182views Hardware» more  DATE 2008»
14 years 3 months ago
A Novel Low Overhead Fault Tolerant Kogge-Stone Adder Using Adaptive Clocking
— As the feature size of transistors gets smaller, fabricating them becomes challenging. Manufacturing process follows various corrective design-for-manufacturing (DFM) steps to ...
Swaroop Ghosh, Patrick Ndai, Kaushik Roy
DATE
2008
IEEE
92views Hardware» more  DATE 2008»
14 years 3 months ago
Latch Modeling for Statistical Timing Analysis
—Latch based circuits are widely adopted in high performance circuits. But there is a lack of accurate latch models for doing timing analysis. In this paper, we propose a new lat...
Sean X. Shi, Anand Ramalingam, Daifeng Wang, David...
DATE
2008
IEEE
132views Hardware» more  DATE 2008»
14 years 3 months ago
Coarse-Grain MTCMOS Sleep Transistor Sizing Using Delay Budgeting
Power gating is one of the most effective techniques in reducing the standby leakage current of VLSI circuits. In this paper we introduce a new approach for sleep transistor sizin...
Ehsan Pakbaznia, Massoud Pedram
DATE
2008
IEEE
107views Hardware» more  DATE 2008»
14 years 3 months ago
Effective Loop Partitioning and Scheduling under Memory and Register Dual Constraints
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Chun Jason Xue, Edwin Hsing-Mean Sha, Zili Shao, M...
DATE
2008
IEEE
199views Hardware» more  DATE 2008»
14 years 3 months ago
Safe Automatic Flight Back and Landing of Aircraft Flight Reconfiguration Function (FRF)
SOFIA (Safe Automatic Flight Back and Landing of Aircraft) project is a response to the challenge of developing concepts and techniques enabling the safe and automatic return to g...
Juan Alberto Herreria Garcia
DATE
2008
IEEE
108views Hardware» more  DATE 2008»
14 years 3 months ago
CASP: Concurrent Autonomous Chip Self-Test Using Stored Test Patterns
CASP, Concurrent Autonomous chip self-test using Stored test Patterns, is a special kind of self-test where a system tests itself concurrently during normal operation without any ...
Yanjing Li, Samy Makar, Subhasish Mitra
DATE
2008
IEEE
117views Hardware» more  DATE 2008»
14 years 3 months ago
Architecture Exploration of NAND Flash-based Multimedia Card
In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploratio...
Sungchan Kim, Chanik Park, Soonhoi Ha
DATE
2008
IEEE
113views Hardware» more  DATE 2008»
14 years 3 months ago
Compositional, dynamic cache management for embedded chip multiprocessors
This paper proposes a dynamic cache repartitioning technique that enhances compositionality on platforms executing media applications with multiple utilization scenarios. The repa...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
DATE
2008
IEEE
68views Hardware» more  DATE 2008»
14 years 3 months ago
Efficient Representation and Analysis of Power Grids
João M. S. Silva, Joel R. Phillips, Luis Mi...