ISPD
2010
ACM
14 years 8 months ago
2010
ACM
Double Patterning Lithography (DPL) is one of the few hopeful candidate solutions for the lithography for CMOS process beyond 45nm. DPL assigns the patterns less than a certain di...
ISQED
2010
IEEE
14 years 8 months ago
2010
IEEE
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
ISQED
2010
IEEE
14 years 8 months ago
2010
IEEE
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
ISQED
2010
IEEE
14 years 8 months ago
2010
IEEE
— Post-silicon debug comprises a significant and highly variable fraction of the total development time for large chip designs. To accelerate post-silicon debug, BackSpace [1, 2...
ISQED
2010
IEEE
14 years 8 months ago
2010
IEEE
— Algorithms and tools used for IC implementation do not show deterministic and predictable behaviors with input parameter changes. Due to suboptimality and inaccuracy of underly...
ISQED
2010
IEEE
14 years 8 months ago
2010
IEEE
— Timing exceptions in IC implementation processes, especially timing verification, help reduce pessimism that arises from unnecessary timing constraints by masking non-function...
ISQED
2010
IEEE
14 years 8 months ago
2010
IEEE
Abstract— As the semiconductor technology continues its marching toward the deep sub-micron domain, the strong relation between leakage current and temperature becomes critical i...
ISQED
2010
IEEE
14 years 8 months ago
2010
IEEE
ISQED
2010
IEEE
14 years 8 months ago
2010
IEEE
—Negative Bias Temperature Instability (NBTI) is one of the major reliability problems in advanced technologies. NBTI causes threshold voltage degradation in a PMOS transistor wh...
ISQED
2010
IEEE
14 years 8 months ago
2010
IEEE
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's components, clock distribution network power accounts for a large portion of chip po...