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ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
14 years 9 months ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi
ICCD
2004
IEEE
113views Hardware» more  ICCD 2004»
14 years 9 months ago
End-to-End Testability Analysis and DfT Insertion for Mixed-Signal Paths
Increasing system complexity and test cost demands new system-level solutions for mixed-signal systems. In this paper, we present a testability analysis and DfT insertion methodol...
Sule Ozev, Alex Orailoglu
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
14 years 9 months ago
A Two-Layer Bus Routing Algorithm for High-Speed Boards
The increasing clock frequencies in high-end industrial circuits bring new routing challenges that can not be handled by traditional algorithms. An important design automation pro...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ICCD
2004
IEEE
132views Hardware» more  ICCD 2004»
14 years 9 months ago
Compressed Embedded Diagnosis of Logic Cores
This paper introduces a new method for deterministic diagnosis of logic cores. The proposed method is based on onchip decompression and comparison of incompletely specified test ...
Scott Ollivierre, Adam B. Kinsman, Nicola Nicolici
ICCD
2004
IEEE
87views Hardware» more  ICCD 2004»
14 years 9 months ago
Fetch Halting on Critical Load Misses
As the performance gap between processors and memory systems increases, the CPU spends more time stalled waiting for data from main memory. Critical long latency instructions, suc...
Nikil Mehta, Brian Singer, R. Iris Bahar, Michael ...
ICCD
2004
IEEE
79views Hardware» more  ICCD 2004»
14 years 9 months ago
Using Circuits and Systems-Level Research to Drive Nanotechnology
This paper details nano-scale devices being researched by physical scientists to build computational systems. It also reviews some existing system design work that uses the device...
Michael T. Niemier, Ramprasad Ravichandran, Peter ...
ICCD
2004
IEEE
115views Hardware» more  ICCD 2004»
14 years 9 months ago
Generating Monitor Circuits for Simulation-Friendly GSTE Assertion Graphs
Formal and dynamic (simulation, emulation, etc.) verification techniques are both needed to deal with the overall challenge of verification. Ideally, the same specification/tes...
Kelvin Ng, Alan J. Hu, Jin Yang
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
14 years 9 months ago
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Mi...
ICCD
2004
IEEE
107views Hardware» more  ICCD 2004»
14 years 9 months ago
Network-on-Chip: The Intelligence is in The Wire
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...
Gérard Mas, Philippe Martin
ICCD
2004
IEEE
113views Hardware» more  ICCD 2004»
14 years 9 months ago
Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems
Abstract - This paper describes a communicationcentric design methodology that addresses the fundamental challenges induced by the emergence of truly heterogeneous Systems-on-Chip ...
Radu Marculescu, Diana Marculescu, Larry T. Pilegg...