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FPL
2006
Springer
112views Hardware» more  FPL 2006»
14 years 9 days ago
Real-Time Video Pixel Matching
We present an efficient implementation of a state of the art algorithm PixelMatch for matching all pixels within consecutive video frames. The method is of practical interest for ...
Jean-Baptiste Note, Mark Shand, Jean Vuillemin
FPL
2006
Springer
127views Hardware» more  FPL 2006»
14 years 9 days ago
FPGA Vendor Agnostic True Random Number Generator
This paper describes a solution for the generation of true random numbers in a purely digital fashion; making it suitable for any FPGA type, because no FPGA vendor specific featur...
Dries Schellekens, Bart Preneel, Ingrid Verbauwhed...
FPL
2006
Springer
242views Hardware» more  FPL 2006»
14 years 9 days ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
FPL
2006
Springer
129views Hardware» more  FPL 2006»
14 years 9 days ago
Architecture Exploration and Tools for Pipelined Coarse-Grained Reconfigurable Arrays
We present a heavily parametrized tool suite that allows the modeling and exploration of heterogeneous, coarse-grained, heavily pipelined reconfigurable architectures. Our tools p...
Florian Stock, Andreas Koch
FPL
2006
Springer
80views Hardware» more  FPL 2006»
14 years 9 days ago
A Compiler Intermediate Representation for Reconfigurable Fabrics
An intermediate representation (IR) is a central structure around which tools such as compilers and synthesis tools are built. In this paper we propose such an IR specifically des...
Zhi Guo, Walid A. Najjar
FPL
2006
Springer
87views Hardware» more  FPL 2006»
14 years 9 days ago
Using Reconfigurable HW for High Dimensional CAF Computation
Antonin Hermanek, Michal Kunes, Michal Kvasnicka
FPL
2006
Springer
127views Hardware» more  FPL 2006»
14 years 9 days ago
On-FPGA Communication Architectures and Design Factors
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
FPL
2006
Springer
140views Hardware» more  FPL 2006»
14 years 9 days ago
A Thermal Management and Profiling Method for Reconfigurable Hardware Applications
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
Phillip H. Jones, John W. Lockwood, Young H. Cho
FPL
2006
Springer
108views Hardware» more  FPL 2006»
14 years 9 days ago
Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
James Moscola, Young H. Cho, John W. Lockwood
FPL
2006
Springer
169views Hardware» more  FPL 2006»
14 years 9 days ago
An FPGA-Based Electronic Cochlea with Dual Fixed-Point Arithmetic
An improved FPGA implementation of an electronic cochlea filter is presented. We show that by using decimation, the computations of the electronic cochlea can be reduced. Furtherm...
C. K. Wong, Philip Heng Wai Leong