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FPL
2006
Springer
115views Hardware» more  FPL 2006»
14 years 9 days ago
A Congestion Driven Placement Algorithm for FPGA Synthesis
We introduce a new congestion driven placement algorithm for FPGAs in which the overlappingeffect of boundingboxes is taken into consideration. Experimental results show that comp...
Yue Zhuo, Hao Li, Saraju P. Mohanty
FPL
2006
Springer
219views Hardware» more  FPL 2006»
14 years 9 days ago
FPGA Implementations of the DES and Triple-DES Masked Against Power Analysis Attacks
This paper presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously in...
François-Xavier Standaert, Gaël Rouvro...
FPL
2006
Springer
161views Hardware» more  FPL 2006»
14 years 9 days ago
Predictive Load Balancing for Interconnected FPGAs
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
Jason D. Bakos, Charles L. Cathey, Allen Michalski
FPL
2006
Springer
85views Hardware» more  FPL 2006»
14 years 9 days ago
High-Performance and Parameterized Matrix Factorization on FPGAs
FPGAs have become an attractive choice for scientific computing. In this paper, we propose a high performance design for LU decomposition, a key kernel in many scientific and engi...
Ling Zhuo, Viktor K. Prasanna
FPL
2006
Springer
156views Hardware» more  FPL 2006»
14 years 9 days ago
Improving Usability of FPGA-Based Reconfigurable Computers Through Operating System Support
Advances in FPGA-based reconfigurable computers have made them a viable computing platform for a vast variety of computation demanding areas such as bioinformatics, speech recogni...
Hayden Kwok-Hay So, Robert W. Brodersen
FPL
2006
Springer
115views Hardware» more  FPL 2006»
14 years 9 days ago
Executing Hardware as Parallel Software for Picoblaze Networks
Multi-processor architectures have gained interest recently because of their ability to exploit programmable silicon parallelism at acceptable power-efficiency figures. Despite th...
Pengyuan Yu, Patrick Schaumont
FPL
2006
Springer
111views Hardware» more  FPL 2006»
14 years 9 days ago
A Simulation Platform for Reconfigurable Computing Research
In this paper, we present a full-system reconfigurable computing simulation platform intended to promote innovative new research in reconfigurable computing. Currently, reconfigur...
Wenyin Fu, Katherine Compton
ETS
2006
IEEE
122views Hardware» more  ETS 2006»
14 years 10 days ago
Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics
Online repair through reconfiguration is a particularly advantageous approach in the nanoelectronic environment since reconfigurability is naturally supported by the devices. Howe...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
ETS
2006
IEEE
89views Hardware» more  ETS 2006»
14 years 10 days ago
On-Chip Time Measurement Architecture with Femtosecond Timing Resolution
This paper presents a new on-chip time measurement architecture which is based on the Timeto-Digital Conversion (TDC) method that is capable of achieving a timing resolution of te...
Matthew Collins, Bashir M. Al-Hashimi
ECMDAFA
2006
Springer
137views Hardware» more  ECMDAFA 2006»
14 years 10 days ago
Harvesting Software Systems for MDA-Based Reengineering
Abstract. In this paper we report on a feasibility study in reengineering legacy systems towards a model-driven architecture (MDA). Steps in our approach consist of (1) parsing the...
Thijs Reus, Hans Geers, Arie van Deursen