DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
This paper proposes extensions to the VHDL grammar and de nes new semantics in the language to model the timing behavior of high frequency buses and clock lines with multiple, dis...
DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
A design methodology for the synthesis of digital circuits used in high throughput digital modems is presented. The methodology spans digital modem design from the link level to t...
DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
In modern computer systems the performance is dominated by the memory performance. Currently, there is neither a systematic design methodology nor a tool for the design of memory ...
DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
The paper proposes a novel approach in an attempt to solve the test problem for sequential circuits. Up until now, most of the classical test pattern techniques use a number of al...
DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
DATE
1997
IEEE
14 years 1 months ago
1997
IEEE
In this paper a parametrizable architecture of a motion estimator (ME) is presented. The ME is designed as a generic full pixel calculation module which can be adopted for di eren...