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ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
14 years 1 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
ISMVL
1999
IEEE
65views Hardware» more  ISMVL 1999»
14 years 1 months ago
Bi-Decompositions of Multi-Valued Functions for Circuit Design and Data Mining Applications
Bernd Steinbach, Marek A. Perkowski, Christian Lan...
ISMVL
1999
IEEE
72views Hardware» more  ISMVL 1999»
14 years 1 months ago
Information Relationships and Measures in Application to Logic Design
In this paper, the theory of information relationships and relationship measures is considered and its application to logic design is discussed. This theory makes operational the ...
Lech Józwiak
ISMVL
1999
IEEE
133views Hardware» more  ISMVL 1999»
14 years 1 months ago
Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead
We introduce a new implementation of a ternary adder with four inputs and two outputs. This ternary adder reduces the number of digits in a multiplication compared with a binary m...
Andreas Herrfeld, Siegbert Hentschke
ISMVL
1999
IEEE
76views Hardware» more  ISMVL 1999»
14 years 1 months ago
Multiple-Valued Minimization to Optimize PLAs with Output EXOR Gates
This paper considers an optimization method of programmable logic arrays (PLAs), which have two-input EXOR gate at the outputs. The PLA realizes an EXOR of two sum-of-products exp...
Debatosh Debnath, Tsutomu Sasao
ISMVL
1999
IEEE
90views Hardware» more  ISMVL 1999»
14 years 1 months ago
Transformations between Signed and Classical Clause Logic
In the last years two automated reasoning techniques for clause normal form arose in which the use of labels are prominently featured: signed logic and annotated logic programming...
Bernhard Beckert, Reiner Hähnle, Felip Many&a...
ISCAS
1999
IEEE
102views Hardware» more  ISCAS 1999»
14 years 1 months ago
An asynchronous data recovery/retransmission technique with foreground DLL calibration
S. Nagavarapu, J. Yan, E. K. F. Lee, Randall L. Ge...