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ECBS
1999
IEEE
93views Hardware» more  ECBS 1999»
14 years 1 months ago
Structured Specification of Model Interpreters
Model interpreters play an essential role in modelintegrated systems: they transform domain-specific models into executable models. The state-ot-the-art of model interpreter writi...
Gabor Karsai
ECBS
1999
IEEE
138views Hardware» more  ECBS 1999»
14 years 1 months ago
Multi-Domain Surety Modeling and Analysis for High Assurance Systems
Engineering systems are becoming increasingly complex as state of the art technologies are incorporated into designs. Surety modeling and analysis is an emerging science which per...
James Davis, Jason Scott, Janos Sztipanovits, Marc...
ECBS
1999
IEEE
258views Hardware» more  ECBS 1999»
14 years 1 months ago
Disaster in London: The LAS Case study
Darren Dalcher
DATE
1999
IEEE
118views Hardware» more  DATE 1999»
14 years 1 months ago
Peak Power Estimation Using Genetic Spot Optimization for Large VLSI Circuits
Estimating peak power involves optimization of the circuit's switching function. We propose genetic spot expansion and optimization in this paper to estimate tight peak power...
Michael S. Hsiao
ISPD
1999
ACM
127views Hardware» more  ISPD 1999»
14 years 1 months ago
Buffer insertion for clock delay and skew minimization
 Buffer insertion is an effective approach to achieve both minimal clock signal delay and skew in high speed VLSI circuit design. In this paper, we develop an optimal buffer ins...
X. Zeng, D. Zhou, Wei Li
ISPD
1999
ACM
95views Hardware» more  ISPD 1999»
14 years 1 months ago
Incremental capacitance extraction and its application to iterative timing-driven detailed routing
In this paper, we consider delay optimization in multilayer detailed routing. Given a detailed routing by some detailed router, we iteratively improve the delays of critical nets ...
Yanhong Yuan, Prithviraj Banerjee
ISPD
1999
ACM
92views Hardware» more  ISPD 1999»
14 years 1 months ago
Slicing floorplans with range constraint
Fung Yu Young, D. F. Wong
ISPD
1999
ACM
108views Hardware» more  ISPD 1999»
14 years 1 months ago
On the behavior of congestion minimization during placement
Typical placement objectives involve reducing net-cut cost or minimizing wirelength. Congestion minimization is least understood, however, it models routability accurately. In thi...
Maogang Wang, Majid Sarrafzadeh
DATE
1999
IEEE
139views Hardware» more  DATE 1999»
14 years 1 months ago
OpenJ: An Extensible System Level Design Language
There is an increasing research interest in system level design languages which can carry designers from specification to implementation of system-on-a-chip. Unfortunately, two of...
Jianwen Zhu, Daniel Gajski
DATE
1999
IEEE
72views Hardware» more  DATE 1999»
14 years 1 months ago
On Programmable Memory Built-In Self Test Architectures
The design and architectures of a microcode-based memory BIST and programmable FSM-based memory BIST unit are presented. The proposed microcode-based memory BIST unit is more e ci...
Kamran Zarrineh, Shambhu J. Upadhyaya