Sciweavers

DATE
2002
IEEE
69views Hardware» more  DATE 2002»
14 years 1 months ago
Flip-Flop and Repeater Insertion for Early Interconnect Planning
We present a unified framework that considers flipflop and repeater insertion and the placement of flipflop/repeater blocks during RT or higher level design. We introduce the...
Ruibing Lu, Guoan Zhong, Cheng-Kok Koh, Kai-Yuan C...
DATE
2002
IEEE
135views Hardware» more  DATE 2002»
14 years 1 months ago
A Code Transformation-Based Methodology for Improving I-Cache Performance of DSP Applications
This paper focuses on I-cache behaviour enhancement through the application of high-level code transformations. Specifically, a flow for the iterative application of the I-Cache pe...
Nikolaos D. Liveris, Nikolaos D. Zervas, Dimitrios...
DATE
2002
IEEE
128views Hardware» more  DATE 2002»
14 years 1 months ago
Arbitrary Convex and Concave Rectilinear Module Packing Using TCG
In this paper, we deal with arbitrary convex and concave rectilinear module packing using the Transitive Closure Graph (TCG) representation. The geometric meanings of modules are ...
Jai-Ming Lin, Hsin-Lung Chen, Yao-Wen Chang
DATE
2002
IEEE
89views Hardware» more  DATE 2002»
14 years 1 months ago
A Hierarchical Test Scheme for System-On-Chip Designs
System-on-chip (SOC) design methodology is becoming the trend in the IC industry. Integrating reusable cores from multiple sources is essential in SOC design, and different design...
Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pi...
DATE
2002
IEEE
83views Hardware» more  DATE 2002»
14 years 1 months ago
Reconfigurable SoC - What Will it Look Like?
The argument against ASIC SoCs is that they have always taken too long and cost too much to design. As new process technologies come on line, the issue of inflexible, unyielding d...
J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chri...
DATE
2002
IEEE
98views Hardware» more  DATE 2002»
14 years 1 months ago
A New ATPG Algorithm to Limit Test Set Size and Achieve Multiple Detections of All Faults
Deterministic observation and random excitation of fault sites during the ATPG process dramatically reduces the overall defective part level. However, multiple observations of eac...
Sooryong Lee, Brad Cobb, Jennifer Dworak, Michael ...
DATE
2002
IEEE
169views Hardware» more  DATE 2002»
14 years 1 months ago
Built-In Dynamic Current Sensor for Hard-to-Detect Faults in Mixed-Signal Ics
There are some types of faults in analogue and mixed signal circuits which are very difficult to detect using either voltage or current based test methods. However, it is possible...
Yolanda Lechuga, Román Mozuelos, Mar Mart&i...
DATE
2002
IEEE
112views Hardware» more  DATE 2002»
14 years 1 months ago
Global Optimization Applied to the Oscillator Problem
The oscillator problem consists of determining good initial values for the node voltages and the frequency of oscillation and the avoidance of the DC solution. Standard approaches...
S. Lampe, S. Laur
DATE
2002
IEEE
117views Hardware» more  DATE 2002»
14 years 1 months ago
Effective Software Self-Test Methodology for Processor Cores
Software self-testing for embedded processor cores based on their instruction set, is a topic of increasing interest since it provides an excellent test resource partitioning tech...
Nektarios Kranitis, Antonis M. Paschalis, Dimitris...