Sciweavers

DATE
2002
IEEE
63views Hardware» more  DATE 2002»
14 years 1 months ago
An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs
Ashok Halambi, Aviral Shrivastava, Partha Biswas, ...
DATE
2002
IEEE
115views Hardware» more  DATE 2002»
14 years 1 months ago
Design Technology for Networked Reconfigurable FPGA Platforms
Future networked appliances should be able to download new services or upgrades from the network and execute them locally. This flexibility is typically achieved by processors tha...
Steve Guccione, Diederik Verkest, Ivo Bolsens
DATE
2002
IEEE
97views Hardware» more  DATE 2002»
14 years 1 months ago
Analog IP Testing: Diagnosis and Optimization
In this paper, we present an innovative methodology to estimate and improve the quality of analog and mixed-signal circuit testing. We first detect and reduce the redundancy in th...
Carlo Guardiani, Patrick McNamara, Lidia Daldoss, ...
DATE
2002
IEEE
83views Hardware» more  DATE 2002»
14 years 1 months ago
Memory System Connectivity Exploration
In programmable embedded systems, the memory subsystem represents a major cost, performance and power bottleneck. To optimize the system for such different goals, the designer wou...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
DATE
2002
IEEE
108views Hardware» more  DATE 2002»
14 years 1 months ago
Networks on Silicon: Combining Best-Effort and Guaranteed Services
We advocate a network on silicon (NOS) as a hardware architecture to implement communication between IP cores in future technologies, and as a software model in the form of a prot...
Kees G. W. Goossens, Paul Wielage, Ad M. G. Peeter...
DATE
2002
IEEE
113views Hardware» more  DATE 2002»
14 years 1 months ago
BerkMin: A Fast and Robust Sat-Solver
We describe a SAT-solver, BerkMin, that inherits such features of GRASP, SATO, and Chaff as clause recording, fast BCP, restarts, and conflict clause “aging”. At the same time...
Evguenii I. Goldberg, Yakov Novikov
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 1 months ago
E-Design Based on the Reuse Paradigm
This paper gives an overview on a Virtual electronic component or IP (Intellectual Property) exchange infrastructure whose main components are a XML "well structured IP e-cat...
L. Ghanmi, A. Ghrab, M. Hamdoun, B. Missaoui, K. S...
DATE
2002
IEEE
81views Hardware» more  DATE 2002»
14 years 1 months ago
Single-Track Asynchronous Pipeline Templates Using 1-of-N Encoding
This paper presents a new fast and templatized family of fine-grain asynchronous pipeline stages based on the single-track protocol. No explicit control wires are required outside...
Marcos Ferretti, Peter A. Beerel
DATE
2002
IEEE
105views Hardware» more  DATE 2002»
14 years 1 months ago
Functional Verification for SystemC Descriptions Using Constraint Solving
Fabrizio Ferrandi, Michele Rendine, Donatella Sciu...