Sciweavers

DATE
2002
IEEE
98views Hardware» more  DATE 2002»
14 years 1 months ago
A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits
A unified approach to fault simulation for FGDs is introduced. Instead of a direct fault simulation, the proposed approach calculates indirectly from the simulator output the set...
Michael Pronath, Helmut E. Graeb, Kurt Antreich
DATE
2002
IEEE
124views Hardware» more  DATE 2002»
14 years 1 months ago
Parameter Controlled Automatic Symbolic Analysis of Nonlinear Analog Circuits
In this paper we introduce an approach for parameter controlled symbolic analysis of nonlinear analog circuits. Based on a state-of–the-art algorithm, it enables the removal of ...
Ralf Popp, Joerg Oehmen, Lars Hedrich, Erich Barke
DATE
2002
IEEE
100views Hardware» more  DATE 2002»
14 years 1 months ago
AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors
This paper describes the AccuPower toolset -- a set of simulation tools accurately estimating the power dissipation within a superscalar microprocessor. AccuPower uses a true hard...
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
DATE
2002
IEEE
114views Hardware» more  DATE 2002»
14 years 1 months ago
Test Enrichment for Path Delay Faults Using Multiple Sets of Target Faults
Test sets for path delay faults in circuits with large numbers of paths are typically generated for path delay faults associated with the longest circuit paths. We show that such ...
Irith Pomeranz, Sudhakar M. Reddy
DATE
2002
IEEE
153views Hardware» more  DATE 2002»
14 years 1 months ago
Low Power Embedded Software Optimization Using Symbolic Algebra
The market demand for portable multimedia applications has exploded in the recent years. Unfortunately, for such applications current compilers and software optimization methods o...
Armita Peymandoust, Tajana Simunic, Giovanni De Mi...
DATE
2002
IEEE
108views Hardware» more  DATE 2002»
14 years 1 months ago
A Case Study for the Verification of Complex Timed Circuits: IPCMOS
ions + Assume Guarantee + Induction GOAL: Formal verification of the IPCMOS architecture
Marco A. Peña, Jordi Cortadella, Alexander ...
DATE
2002
IEEE
86views Hardware» more  DATE 2002»
14 years 1 months ago
A Layered, Codesign Virtual Machine Approach to Modeling Computer Systems
By using a macro/micro state model we show how assumptions on the resolution of logical and physical timing of computation in computer systems has resulted in design methodologies...
JoAnn M. Paul, Donald E. Thomas
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 1 months ago
Exact Grading of Multiple Path Delay Faults
The problem of fault grading for multiple path delay faults is studied and a method of obtaining the exact coverage is presented. The faults covered are represented and manipulate...
Saravanan Padmanaban, Spyros Tragoudas
DATE
2002
IEEE
107views Hardware» more  DATE 2002»
14 years 1 months ago
High-Speed Non-Linear Asynchronous Pipelines
Many approaches recently proposed for high-speed asynchronous pipelines are applicable only to linear datapaths. However, real systems typically have non-linearities in their data...
Recep O. Ozdag, Peter A. Beerel, Montek Singh, Ste...