Sciweavers

IWSOC
2005
IEEE
112views Hardware» more  IWSOC 2005»
14 years 2 months ago
Practical Techniques for Performance Estimation of Processors
Performance estimation of processor is important to select the right processor for an application. Poorly chosen processors can either under perform very badly or over perform but...
Abhijit Ray, Thambipillai Srikanthan, Wu Jigang
IWSOC
2005
IEEE
190views Hardware» more  IWSOC 2005»
14 years 2 months ago
A CMOS Quality Factor Enhanced Parallel Resonant LC-Tank with Independent Q and Frequency Tuning for RF Integrated Filters
—A new quality factor enhanced resonator core is presented and used to design a bandpass filter at 2.4GHz. The new Q-enhanced LC-tank has independent Q tuning capability, which s...
Joshua K. Nakaska, James W. Haslett
IWSOC
2005
IEEE
133views Hardware» more  IWSOC 2005»
14 years 2 months ago
Design Mapping, and Simulations of a 3G WCDMA/FDD Basestation Using Network on Chip
This paper presents a case study of a single-chip 3G WCDMA/FDD basestation implementation based on a circuit-switched network on chip. As the amount of transistors on a chip conti...
Daniel Wiklund, Dake Liu
IWSOC
2005
IEEE
121views Hardware» more  IWSOC 2005»
14 years 2 months ago
Open HW, Open Design SW, and the VC Ecosystem Dilemma
The open model for solutions development is quickly extending from software to other technology areas, such as hardware and services. Specifically, just as open source has spawned...
Juan Antonio Carballo
IWSOC
2005
IEEE
131views Hardware» more  IWSOC 2005»
14 years 2 months ago
Very High Radix Scalable Montgomery Multipliers
This paper describes a very high radix scalable Montgomery multiplier. It extends the radix-2 Tenca-Koç scalable architecture using w × v – bit integer multipliers in place of...
Kyle Kelley, David Harris
ISQED
2005
IEEE
78views Hardware» more  ISQED 2005»
14 years 2 months ago
Staggered Twisted-Bundle Interconnect for Crosstalk and Delay Reduction
Abstract— To achieve small delay and low crosstalk for multiple signal nets with capacitive and inductive coupling, we propose in this paper a novel interconnect structure, stagg...
Hao Yu, Lei He
ISQED
2005
IEEE
92views Hardware» more  ISQED 2005»
14 years 2 months ago
An Interconnect Insensitive Linear Time-Varying Driver Model for Static Timing Analysis
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...
Chung-Kuan Tsai, Malgorzata Marek-Sadowska
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
14 years 2 months ago
An ILP Formulation for Reliability-Oriented High-Level Synthesis
Reliability decisions taken early in system design can bring significant benefits in terms of design quality. This paper presents a 0-1 integer linear programming (ILP) formulatio...
Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Er...
ISQED
2005
IEEE
128views Hardware» more  ISQED 2005»
14 years 2 months ago
Reliability-Centric Hardware/Software Co-Design
This paper proposes a reliability-centric hardware/ software co-design framework. This framework operates with a component library that provides multiple alternates for a given ta...
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, ...
ISQED
2005
IEEE
112views Hardware» more  ISQED 2005»
14 years 2 months ago
Two-Dimensional Layout Migration by Soft Constraint Satisfaction
Layout migration has re-emerged as an important task due to the increasing use of library hard intellectual properties. While recent advances of migration tools have accommodated ...
Qianying Tang, Jianwen Zhu