ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
In this work, we present a genetic algorithm based thermal-aware floorplanning framework that aims at reducing hot spots and distributing temperature evenly across a chip while op...
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
Abstract— Reliability enhancements are traditionally implemented through redundancies at the system level or through the use of harden-cell-designs at the circuit level. Reliabil...
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
Abstract - This paper studies design considerations for lowpower ultra wideband (UWB) receiver architectures. First, three different architectures for the impulse-radio UWB transce...
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
This paper discusses clock skew due to manufacturing variability and environmental change. In clock tree design, transition time constraint is an important design parameter that c...
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
With continued aggressive process scaling in the subwavelength lithographic regime, resolution enhancement techniques (RETs) such as optical proximity correction (OPC) are an inte...
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
Leakage power has become one of the most critical design concerns for the system-level chip designer. Multi-threshold techniques have been used to reduce runtime leakage power wit...
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
Today's System-on-a-Chip (SoC) design methodology provides an efficient way to develop highly integrated systems on a single chip by utilizing pre-designed intellectual prope...