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ICCAD
1995
IEEE
68views Hardware» more  ICCAD 1995»
14 years 4 months ago
Generating sparse partial inductance matrices with guaranteed stability
This paper proposes a definition of magnetic vector potential that can be used to evaluate sparse partial inductance matrices. Unlike the commonly applied procedure of discarding...
Byron Krauter, Lawrence T. Pileggi
ICCAD
1995
IEEE
144views Hardware» more  ICCAD 1995»
14 years 4 months ago
Background memory management for dynamic data structure intensive processing systems
Abstract -- Telecommunication network management applications often require application-specific ICs that use large dynamically allocated stored data structures. Currently availab...
Gjalt G. de Jong, Bill Lin, Carl Verdonck, Sven Wu...
ICCAD
1995
IEEE
120views Hardware» more  ICCAD 1995»
14 years 4 months ago
Pattern generation for a deterministic BIST scheme
Recently a deterministic built-in self-test scheme has been presented based on reseeding of multiple-polynomial linear feedback shift registers. This scheme encodes deterministic ...
Sybille Hellebrand, Birgit Reeb, Steffen Tarnick, ...
ICCAD
1995
IEEE
134views Hardware» more  ICCAD 1995»
14 years 4 months ago
A delay model for logic synthesis of continuously-sized networks
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
Joel Grodstein, Eric Lehman, Heather Harkness, Bil...
ICCAD
1995
IEEE
65views Hardware» more  ICCAD 1995»
14 years 4 months ago
Symbolic hazard-free minimization and encoding of asynchronous finite state machines
Robert M. Fuhrer, Bill Lin, Steven M. Nowick
ICCAD
1995
IEEE
136views Hardware» more  ICCAD 1995»
14 years 4 months ago
A controller-based design-for-testability technique for controller-data path circuits
This paper investigates the effect of the controller on the testability of sequential circuits composed of controllers and data paths. It is shown that even when both the controll...
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
ICCAD
1995
IEEE
78views Hardware» more  ICCAD 1995»
14 years 4 months ago
A unified approach to topology generation and area optimization of general floorplans
Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab...
ICCAD
1995
IEEE
140views Hardware» more  ICCAD 1995»
14 years 4 months ago
Bounded-skew clock and Steiner routing under Elmore delay
: We study the minimum-cost bounded-skew routing tree problem under the Elmore delay model. We presenttwo approachesto construct bounded-skew routing trees: (i) the Boundary Mergin...
Jason Cong, Andrew B. Kahng, Cheng-Kok Koh, Chung-...