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ICCAD
2005
IEEE
118views Hardware» more  ICCAD 2005»
14 years 8 months ago
Thermal via planning for 3-D ICs
Heat dissipation is one of the most serious challenges in 3D IC designs. One effective way of reducing circuit temperature is to introduce thermal through-the-silicon (TTS) vias....
Jason Cong, Yan Zhang
ICCAD
2005
IEEE
125views Hardware» more  ICCAD 2005»
14 years 8 months ago
Robust mixed-size placement under tight white-space constraints
A novel and very simple correct-by-construction top-down methodology for high-utilization mixed-size placement is presented. The PolarBear algorithm combines recursive cutsize-dri...
Jason Cong, Michail Romesis, Joseph R. Shinnerl
ICCAD
2005
IEEE
141views Hardware» more  ICCAD 2005»
14 years 8 months ago
Architecture and compilation for data bandwidth improvement in configurable embedded processors
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
Jason Cong, Guoling Han, Zhiru Zhang
ICCAD
2005
IEEE
95views Hardware» more  ICCAD 2005»
14 years 8 months ago
TACO: temperature aware clock-tree optimization
— In this paper, an efficient linear time algorithm TACO is proposed for the first time to minimize the worst case clock skew in the presence of on-chip thermal variation. TACO...
Minsik Cho, Suhail Ahmed, David Z. Pan
ICCAD
2005
IEEE
105views Hardware» more  ICCAD 2005»
14 years 8 months ago
Response shaper: a novel technique to enhance unknown tolerance for output response compaction
The presence of unknown values in the simulation result is a key barrier to effective output response compaction in practice. This paper proposes a simple circuit module, called a...
Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Cha...
ICCAD
2005
IEEE
83views Hardware» more  ICCAD 2005»
14 years 8 months ago
Post-placement rewiring and rebuffering by exhaustive search for functional symmetries
Separate optimizations of logic and layout have been thoroughly studied in the past and are well documented for common benchmarks. However, to be competitive, modern circuit optim...
Kai-Hui Chang, Igor L. Markov, Valeria Bertacco
ICCAD
2005
IEEE
200views Hardware» more  ICCAD 2005»
14 years 8 months ago
CDMA/FDMA-interconnects for future ULSI communications
Future inter- and intra-ULSI interconnect systems demand extremely high data rates as well as bi-directional multi-I/O concurrent service, re-configurable computing/processing arc...
M. Frank Chang
ICCAD
2005
IEEE
131views Hardware» more  ICCAD 2005»
14 years 8 months ago
Code restructuring for improving cache performance of MPSoCs
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
Guilin Chen, Mahmut T. Kandemir
ICCAD
2005
IEEE
147views Hardware» more  ICCAD 2005»
14 years 8 months ago
NoCEE: energy macro-model extraction methodology for network on chip routers
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
Jeremy Chan, Sri Parameswaran
ICCAD
2005
IEEE
93views Hardware» more  ICCAD 2005»
14 years 8 months ago
Eliminating wire crossings for molecular quantum-dot cellular automata implementation
— When exploring computing elements made from technologies other than CMOS, it is imperative to investigate the effects of physical implementation constraints. This paper focuses...
Amitabh Chaudhary, Danny Z. Chen, Kevin Whitton, M...