Sciweavers

ICCD
2005
IEEE
109views Hardware» more  ICCD 2005»
14 years 8 months ago
Reducing the Energy of Speculative Instruction Schedulers
Energy dissipation from the issue queue and register file constitutes a large portion of the overall energy budget of an aggressive dynamically scheduled microprocessor. We propo...
Yongxiang Liu, Gokhan Memik, Glenn Reinman
ICCD
2005
IEEE
124views Hardware» more  ICCD 2005»
14 years 8 months ago
Accurate Diagnosis of Multiple Faults
In this paper, we propose a diagnostic test generation method in conjunction with an efficient sequential SAT-based diagnosis procedure to precisely identify multiple defective si...
Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng
ICCD
2005
IEEE
124views Hardware» more  ICCD 2005»
14 years 8 months ago
A Thermally-Aware Methodology for Design-Specific Optimization of Supply and Threshold Voltages in Nanometer Scale ICs
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for VLSI design. This paper,...
Sheng-Chih Lin, Navin Srivastava, Kaustav Banerjee
ICCD
2005
IEEE
134views Hardware» more  ICCD 2005»
14 years 8 months ago
Analytical Model for Sensor Placement on Microprocessors
Thermal management in microprocessors has become a major design challenge in recent years. Thermal monitoring through hardware sensors is important, and these sensors must be care...
Kyeong-Jae Lee, Kevin Skadron, Wei Huang
ICCD
2005
IEEE
127views Hardware» more  ICCD 2005»
14 years 8 months ago
Using Scratchpad to Exploit Object Locality in Java
Performance of modern computers is tied closely to the effective use of cache because of the continually increasing speed discrepancy between processors and main memory. We demons...
Carl S. Lebsack, J. Morris Chang
ICCD
2005
IEEE
221views Hardware» more  ICCD 2005»
14 years 8 months ago
Broadband Impedance Matching for Inductive Interconnect in VLSI Packages
Abstract— Noise induced by impedance discontinuities from VLSI packaging is one of the leading challenges facing system level designers in the next decade. The performance of IC ...
Brock J. LaMeres, Sunil P. Khatri
ICCD
2005
IEEE
100views Hardware» more  ICCD 2005»
14 years 8 months ago
Temporal Decomposition for Logic Optimization
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
Nathan Kitchen, Andreas Kuehlmann
ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
14 years 8 months ago
Counter-Based Cache Replacement Algorithms
Recent studies have shown that in highly associative caches, the performance gap between the Least Recently Used (LRU) and the theoretical optimal replacement algorithms is large,...
Mazen Kharbutli, Yan Solihin
ICCD
2005
IEEE
111views Hardware» more  ICCD 2005»
14 years 8 months ago
Supply Voltage Degradation Aware Analytical Placement
Increasingly significant power/ground supply voltage degradation in nanometer VLSI designs leads to system performance degradation and even malfunction. Existing techniques focus...
Andrew B. Kahng, Bao Liu, Qinke Wang