ITC
1998
IEEE
14 years 23 days ago
1998
IEEE
A deterministic BIST scheme for circuits with multiple scan paths is presented. A procedure is described for synthesizing a pattern generator which stimulates all scan chains simu...
ITC
1998
IEEE
14 years 23 days ago
1998
IEEE
ITC
1998
IEEE
14 years 23 days ago
1998
IEEE
This work proposes an approach to generate weighted random patterns which can maximally excite a circuit during its burn-in testing. The approach is based on a probability model a...
ITC
1998
IEEE
14 years 23 days ago
1998
IEEE
ITC
1998
IEEE
14 years 23 days ago
1998
IEEE
ABSTRACT - A multiple pass A/D conversion technique is proposed for mixed-signal test applications. Only a single on-chip comparator and sample-and-hold circuit is required to digi...
ITC
1998
IEEE
14 years 23 days ago
1998
IEEE
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
ITC
1998
IEEE
14 years 23 days ago
1998
IEEE
We investigate defects in CMOS domino gates and derive the test conditions for them. Very-Low-Voltage Testing can improve the defect coverage, which we define as the maximum detec...
ITC
1998
IEEE
14 years 23 days ago
1998
IEEE
ITC
1998
IEEE
14 years 23 days ago
1998
IEEE
