ASPDAC
2007
ACM
14 years 3 months ago
2007
ACM
Abstract-- In this paper, a technique that can efficiently reduce peak and average switching activity during test application is proposed. The proposed method does not require any ...
ITC
2003
IEEE
14 years 4 months ago
2003
IEEE
Scan-based architectures, though widely used in modern designs, are expensive in power consumption. In this paper, we present a new technique that allows to design power-optimized...
DATE
2005
IEEE
14 years 5 months ago
2005
IEEE
Power dissipation during test is a major challenge in testing integrated circuits. Dynamic power has been the dominant part of power dissipation in CMOS circuits, however, in futu...
IROS
2006
IEEE
14 years 5 months ago
2006
IEEE
— Scan-matching based on data from a laser scanner is frequently used for mapping and localization. This paper presents an scan-matching approach based instead on visual informat...
INFOCOM
2007
IEEE
14 years 5 months ago
2007
IEEE
Abstract— This paper considers two issues arising in an integrated IEEE 802.16e/802.11 network: 1) finding a possible network, which mobile station (MSTA) can switch to, and 2) ...
DATE
2007
IEEE
14 years 5 months ago
2007
IEEE
Errors in timing closure process during the physical design stage may result in systematic silicon failures, such as scan chain hold time violations, which prohibit the test of ma...
DFT
2008
IEEE
14 years 6 months ago
2008
IEEE
Scan-based debug methods give high observability of internal signals, however, they require halting the system to scan out responses from the circuit-under-debug (CUD). This is ti...
DATE
2008
IEEE
14 years 6 months ago
2008
IEEE
Keeping diagnostic resolution as high as possible while maximizing the compaction ratio is subject to research since the advent of embedded test. In this paper, we present a novel...