ICCAD
1994
IEEE
14 years 20 days ago
1994
IEEE
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
RTAS
1996
IEEE
14 years 21 days ago
1996
IEEE
Real-time programmers have to deal with the problem of relating timing constraints associated with source code to sequences of machine instructions. This paper describes an enviro...
CODES
1997
IEEE
14 years 23 days ago
1997
IEEE
– Retargetability of embedded system descriptions not only enables better exploration of the design space and evaluation of cost/performance tradeoffs but also enhances design ma...
ISSS
1999
IEEE
14 years 25 days ago
1999
IEEE
Code generation methods for digital signal processors are increasingly hampered by the combination of tight timing constraints imposed by the algorithms and the limited capacity o...
ISCAS
1999
IEEE
14 years 25 days ago
1999
IEEE
In this paper, we present a new method for verifying the realizability of a timing diagram with linear timing constraints, thus ensuring that the implementation of the underlying ...
ASPDAC
1999
ACM
14 years 26 days ago
1999
ACM
We present an algorithm for solving a general min-cut, twoway partitioning problem subject to timing constraints. The problem is formulated as a constrained programming problem an...
DSN
2000
IEEE
14 years 29 days ago
2000
IEEE
In the recent development of avionics systems, Integrated Modular Avionics (IMA) is advocated for next generation architecture that needs integration of mixedcriticality real-time...
RTSS
2002
IEEE
14 years 1 months ago
2002
IEEE
Closed-loop control systems are dynamic systems subject to perturbations. One of the main concerns of the control is to design controllers to correct or limit the deviation that t...
ECBS
2002
IEEE
14 years 1 months ago
2002
IEEE
Design and implementation of motion control applications includes the transition from control design to real-time system implementation. To make this transition smooth, the specif...
ISQED
2003
IEEE
14 years 1 months ago
2003
IEEE
A structurally testable delay fault might become untestable in the functional mode of the circuit due to logic or timing constraints or both. Experimental data suggests that there...