190
Voted
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
160
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
158
click to vote
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
193
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
157
click to vote
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Increasing source voltage (Source-Biasing) is an efficient technique for reducing gate and sub-threshold leakage of SRAM arrays. However, due to process variation, a higher source...
157
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...
165
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
For statistical timing and power analysis that are very important problems in the sub-100nm technologies, stochastic analysis of power grids that characterizes the voltage fluctua...
186
click to vote
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Graphics-intensive computer games are no longer restricted to highperformance desktops, but are also available on a variety of portable devices ranging from notebooks to PDAs and ...